摘要
利用半带滤波器中冲激响应的对称性 ,引进新算法实现乘加运算块内的操作 ,改变内存存储和寻址方式 ,设计了低功耗、高速率的抽取和内插数字滤波器的集成电路 .实验结果表明 ,它大大改善了滤波器的功耗、速率等性能 ,减少了卷积运算中的移位次数和加法器数目 。
Design of digital filters for A/D and D/A converters was discussed. Based on the halfband filter's character of symmetrical impulse response, new algorithm for multiplyadd block and change of the mode of memory addressing, it come at low filter's power consumption and high calculation speed. The experiment results show that the steps of shift and number of adders are decreased, and the efficiency of hardware usage highly increased.
出处
《上海交通大学学报》
EI
CAS
CSCD
北大核心
2000年第6期800-802,共3页
Journal of Shanghai Jiaotong University