小卫星PD姿态控制器IP核的FPGA实现

The FPGA implementation of IP core of PD attitude controller for small satellites

针对现代小卫星在姿态控制系统中对运算速度、控制精度等方面提出的更高要求,分析了利用FP-GA来实现卫星姿态PD控制器的可行性,提出用输入使能端及输出标志符号对内部各计算模块进行控制以解决数据同步问题.利用硬件描述语言进行了各模块功能的实现,并最终例化为PD控制器IP核.结果表明该设计只需34个时钟脉冲即可完成姿态控制力矩的计算,控制精度达到10-5量级,速度及精度满足现代小卫星对控制系统的要求.

In the sight of the higher requirement about operation speed and control accuracy in satellite attitude control system, this paper analyzed the feasibility of PD attitude controller by using FPGA, and proposed a method using the input enable and the output control symbol to dominate the internal calculation module to figure out the problem of data synchronization. The paper used hardware description language to achieve the function of each module, and finally instantiated the IP core of PD controller. The result shows that the design is able to accomplish the calculation of attitude control torque by only using 34 clock pulses and the accuracy of control can reach 10-5 magnitude. The speed and accuracy meet the needs of the modern small satellite control system and lay the foundation for using FPGA implementation in small satellite attitude control system.