分布式多处理机的并行模拟测试

The Parallel Simulation Test in Distributed Multiprocessors

在分布式内存的多处理机系统中,利用FSIN和TRGEN来进行全系统模拟,使用LBR和IPR的阻塞控制机制,对网络中传送的消息包赋予不同的优先权,以减少网络中消息阻塞的发生.各种不同的模拟部件有不同的模拟时钟,计算模块和IN模块在同步机制的协调下并行工作,受时间片的大小限制会引起消息传送的延迟,故需要调整时间片的大小使整个系统的模拟速度和实验精度都有一个合理的取值.

In the distributed memory multicomputer, FSIN and TRGE are used to simulate the full-system. By using the congestion control of LBR and IPR, the passing packet is authorized to the priority, which reduces the network congestion. All the simulators have different simulation clock. In order to coordinate the computing model and IN model, the synchronization is used to coordinate the models. But the synchronization mechanisms are limited by the slice, which causes the message passing delay. So emphasis of simulator is to find out the duration of slice, which gives rise to a reasonable value of the simulation speed and accuracy.