基于并行FPGA阵列的宽带转发式干扰机设计

Design of Broadband Active Decoy Based on FPGA Array

针对目前雷达探测技术缺乏宽带转发式干扰机的现状,提出了一种基于并行FPGA阵列的宽带转发式干扰机的设计方案。首先从理论上分析确定了诱饵的灵敏度和发射功率,而后以12 bit高速DRFM模块为基础,构建了多通道并行储频转发结构,实现了可覆盖GHz级带宽的转发式干扰机系统。实验结果表明,诱饵系统在频率覆盖宽度和输出信号质量等方面均达到了预期水平。

A design of broadband active decoy based on FPGA array was presented to meet the requirements of effective active decoys against modem radars. Firstly, the sensitivity and emitting power of the decoy was settled, then modularization method was adopted and 12 bit high speed DRFM modules was used to build an active decoy whose working bandwidth ranks 1 GHz level. Experiment results showed the decoy meet the requirements of broad working bandwidth, signal characteristics etc.