摘要
互补性金属氧化物半导体(complementary metal-oxide semiconductor,CMOS)工艺尺寸的不断缩小从正面影响了系统的尺寸和性能,同时也对集成电路的可靠性和信号完整性产生了严重的负面影响。为了解决这个问题,提出了一种时间模式信号处理电路代替传统的电压模式信号处理电路,在此基础上,设计了一种基于BSIM3模型、0.18umCMOS工艺的时间模式放大器(TMA,Time-Mode Amplifier)电路,并对该电路进行了原理分析和Hspice仿真,实验结果表明,当输入时间差为皮秒级时,输出时间差会达到纳秒级,能很好地实现时间模式放大功能。
The continuous reduction of size in CMOS process impacts positively the size of the system and performance, and has an acute negative effect on the reliability of integrated circuits and signal integrity. To solve this problem, a time-mode signal processing circuit is introduced rather than traditional voltage-mode processing circuit. On the basis, a time-mode amplifier (TMA) circuit is proposed based on BSIM3 model and 0. 18urn CMOS process. The circuit is simulated by Hspice and its princi ple is analyzed. Simulation results show that: while the input time-difference variable is picoseconds, output time-difference variable is nanoseconds. The circuit can effectively realize the function of time-mode amplification.
出处
《计算机工程与设计》
CSCD
北大核心
2012年第11期4362-4365,4371,共5页
Computer Engineering and Design
基金
中央高校基本科研业务基金项目(531107040299)
国家自然科学基金项目(60876022)
湖南省自然科学基金项目(07JJ6132)
国家863高技术研究发展计划基金项目(2006AA04A104)
广东省产学研基金项目(2009B090300196)