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基于伪门故障模型的PTM可靠度评估方法 被引量：1

CIRCUIT RELIABILITY EVALUATION BASED ON PSEUDO-GATE MODEL
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摘要 为准确评价瞬时故障对电路可靠性的影响,通过将互连线故障建模在逻辑门的输入,建立伪门故障模型,并将之应用于基于Probability Transfer Matrix(PTM)的可靠度评估方法。在可靠度分析过程之中构建伪门并计算其PTM,从而计算出电路的PTM以及可靠度。通过对74系列电路和ISCAS85基准电路可靠度的计算验证了伪门故障模型以及基于伪门故障模型的PTM可靠度评估方法的有效性。 To evaluate accurately the impact of transient fault in logic circuit,a pseudo-gate（PG） model is proposed through modeling interconnection fault at the input of logic gate,and applied in probability transfer matrix（PTM） based circuit reliability evaluation method.PG is constructed and its PTM is computed in the process of reliability evaluation,in this way the circuit PTM is obtained and the circuit reliability is calculated.The effectiveness of PG model based reliability evaluation method is validated by computing the reliability of ISCAS85 benchmark circuits.
作者 卜登立
机构地区 井冈山大学电子与信息工程学院 同济大学软件学院
出处 《井冈山大学学报（自然科学版）》 2012年第6期56-60,共5页 Journal of Jinggangshan University (Natural Science)
关键词 瞬时故障 电路可靠度 伪门故障模型 概率转移矩阵 transient fault circuit reliability pseudo-gate fault model probability transfer matrix
分类号 TP331 [自动化与计算机技术—计算机系统结构] TP202.1 [自动化与计算机技术—检测技术与自动化装置]
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参考文献10

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二级参考文献14

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共引文献17

同被引文献8

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  • 7李辉,汪鹏君,王振海.混合极性列表技术及其在MPRM电路面积优化中的应用[J].计算机辅助设计与图形学学报,2011,23(3):527-533. 被引量：15
  • 8卜登立,江建慧.使用系数矩阵变换极性转换的MPRM电路面积优化[J].计算机辅助设计与图形学学报,2013,25(1):126-135. 被引量：10

引证文献1

井冈山大学学报（自然科学版）
2012年 第6期

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