期刊文献+

用于多电压域设计的双向全摆幅电平转换器 被引量:4

A threshold to full swing bidirectional level shifter for multi-voltage system
下载PDF
导出
摘要 提出了一种无静态漏电流的高性能电平转换器.与现有的电平转换器不同,此设计能够在无静态功耗的情况下,将阈值电压转换为全摆幅输出,只要输入电平高于输出端电压域的NMOS的阈值电压即可正常工作,并且具有更短的传播延时和更低的动态功耗.此设计具有通用性,其电平转换范围仅受限于半导体工艺.针对40 nm工艺实现了该电平转换器电路,并且用SPICE模型进行了仿真.仿真结果显示:该电平转换器能够在无静态功耗的情况下,将0.9 V的输入电平转换为输出端电压域的工作电平1.8 V,传播延时仅为200 ps. This paper presents a high performance level shifter with null static leakage current. Unlike the existing level shifter circuits, the proposed level shifter can shift threshold voltage level to fuU swing level without any static power consumption as long as the input signal level is higher than the threshold voltage of NMOS in output power domain. Moreover, the proposed level shifter has shorter propagation delay and consumes less dynamic power than existing designs. The proposed circuit is generic in nature and the range of shifting level is limited only by the scope of the semiconductor process. The proposed level shifter is designed in 40nm CMOS technology and simulated in SPICE. The simulation results show that the proposed level shifter circuit is able to shift O. 9 V of input leve~ to 1.8 V of operating voRage of the output domair~ 200 ps propagat^o~ delay and null static power consumption.
出处 《上海师范大学学报(自然科学版)》 2012年第5期466-469,共4页 Journal of Shanghai Normal University(Natural Sciences)
关键词 超大规模集成电路 40 NM 多电压域 电平转换器 VLSI 40 nm multi-voltage designs level shifter
  • 相关文献

参考文献3

  • 1CHANG J M,PEDRAM M. Energy minimization using multiple supply voltages [ J ]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1997,5 (4) :436 - 443.
  • 2LUTKEMEIER S, RUCKERT U. A subthreshold to above-threshold level shifter comprising a wilson current mirror [ J ]. IEEE Transactions on Circuits and Systems II: Express Briefs,2010,57 (9) :721 -724.
  • 3ALLEN P E, HOLBERG D R. CMOS analog circuit design[ M]. 2nd edition. Oxford:Oxford University Press,2002.

同被引文献29

  • 1黄春行,朱晓华.CMOS输出缓冲器瞬态行为的SPICE建模[J].南京理工大学学报,2005,29(1):43-45. 被引量:2
  • 2陈爱华,陈永任.一种PIN开关高速驱动器的设计[J].微电子学,2006,36(4):492-494. 被引量:3
  • 3ZHENG X S, TREMBLAY J C, HUETTNE S E, et al.Ka-band high power GaN SPDT switch MMIC [ C ] //Proceedings of IEEE Compound Semiconductor IntegratedCircuit Symposium ( CSICS ). Monterey, CA, USA,2013: 1-5.
  • 4RABAEY J M, CHANDRAKASAN A, NIKOLIC B.数字集成电路-电路、系统与设计[M].周润德,译.第2版.北京:电子工业出版社,2004: 266-268.
  • 5FILANOVSKY I M,BALTES H. CMOS schmitt tiggerdesign [ J ]. IEEE Transactions on Circuit s and Sys-tems, 1994,41 ( 1 ) : 46-49.
  • 6HA J X,GAO Y Z. A threshold to full swing bidirectionallevel shifter for multi-voltage system [ J ]. Journal ofShanghai Normal University ( Natural Sciences),2012,41(5) : 465-469.
  • 7ALI S,TANNER S, FARINE P A. A robust, low power,high speed voltage level shifter with built-in short circuitcurrent reduction [ C ] // Proceedings of the 20th Euro-pean Conference on Circuit Theory and Design ( EC-CTD). Linkoping,Sweden, 2011: 142-145.
  • 8张静,于祥苓,李海泉.浅谈集成电路交流参数的测试[J].微处理机,2008,29(3):28-29. 被引量:6
  • 9陈子晏,马和良,陈磊,杨华,周灏,谢传文,赖宗声,景为平.高性能多模可编程CMOS输出缓冲器的研究实现[J].电子器件,2008,31(5):1483-1486. 被引量:1
  • 10叶红松,李洋,杨阳.一种大电流高速PIN驱动器的设计与实现[J].微电子学,2009,39(1):81-84. 被引量:4

引证文献4

二级引证文献4

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部