基于SRAM的FPGA抗SEU加固技术分析研究

Analysis and Research on SRAM-based FPGA Anti SEU Reinforcement Technology

随着CMOS电路的高速发展,集成密度的增大,低功耗的设计以及系统芯片的普及,导致电路更容易受到空间辐射的影响,尤其是单粒子效应(Single Event Upset,SEU)。本文介绍了基于SRAM的FPGA受到空间辐射环境影响产生的单粒子效应,分析了国内外针对SEU效应提出的一些器件的加固方法:工艺加固、电阻加固、电容加固、电路设计加固等。重点分析介绍了冗余技术、EDAC技术以及Scrubbing技术等电路设计加固技术,总结比较了各种技术的优缺点。

With the high-speed development of CMOS circuit, increasing of integration density and low-power design as well as the popularization of the system-on-chip, it causes circuits are easy to suffer from the effects of space radiation, especially SEU. This paper describes SEU generated by FPGA based on the SRAM which is influenced by space radiation, and the reinforcement methods of devices proposed by SEU effect at home and abroad： process reinforcement, resistance reinforcement, capacitance reinforcement and circuit design reinforcement. This paper focused on circuit design reinforcement techniques, such as redundant technology, EDAC Technologies Scrubbing technology, summarized and compared the advantages and disadvantages of the various technologies.