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FPGA中六倍连线资源的测试

Test of Hex Lines Routing Resources in FPGA
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摘要 通过分析SPARTAN-II FPGA器件的结构及其连线资源分布特点,寻找一种能够快速配置测试、具有高测试覆盖率的测试配置设计。所提出的把六倍资源连线分别配置成多条横向和纵向环形链路的测试配置设计,提高了测试覆盖率,尽可能地减少了测试配置文件数量。测试验证表明这样的连线资源测试配置设计方法,可直接应用到SPARTAN-II系列的所有型号FPGA的测试。通过更改测试模型数据,甚至可以应用于VIRTEX系列的FPGA测试。这种测试配置设计的特点是:测试效率高且具有高的测试覆盖率、测试结构清晰易于故障定位、延展性强可应用于其他型号的FPGA测试。 By analyzing the SPARTAN-II fied program mable gate arrags(FPGA) with device structure and the characteristics of routing resources distribution,a new testing configuration design was presented,which can set up testing environment quickly with high testing coverage.The new testing configuration design was connected all hex lines routing resources into several horizontal and vertical loop lines.It improves the test coverage and reduces the test configuration file numbers.The test results indicate that the new design can be used to test all FPGA of the SPARTAN-II series.The new design can be used to test VIRTEX series FPGA by changing the test module data.The new design features are high test efficiency,easy to locate the fault and strong scalability.
出处 《半导体技术》 CAS CSCD 北大核心 2012年第11期900-904,共5页 Semiconductor Technology
关键词 六倍连线资源 可配置逻辑模块(CLB) 测试配置设计 测试效率 延展性 hex lines routing resource configurable logic block(CLB) design of testing configuration test efficiency scalable
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参考文献11

  • 1张军营,黄均鼐,来金梅,童家榕.基于SRAM的FPGA连线资源的一种可测性设计[J].电路与系统学报,2008,13(1):1-6. 被引量:5
  • 2李文昌,李平,阮爱武,杨志明,廖永波,李威.FPGA中RAM资源的测试定位算法研究及实现[J].微电子学,2011,41(4):608-611. 被引量:1
  • 3WANG S J, TSAI T. Test and diagnosis of faulty logic blocks in FPGAs [ C] //Proceedings of the 1997 IEEE/ ACM International Conference. Washington DC, USA, 1997: 722-727.
  • 4STROUD C, KONALA S, CHEN P. Built-in self-test of logics blocks in FPGAs [ C ] // Proceedings of the 14'h ~LSI Test Symposium. Washington DC, USA, 1996: 387 -392.
  • 5XILINX. Field programmable gate arrays [ K]. 1998.
  • 6XILINX. Spartan-II 2. 5 V FPGA family: complete data sheet [K]. 2004.
  • 7XILINX. Spartan family PROMs [ K]. 2002.
  • 8XILINX. Spartan-IIE 1.8 V FPGA family: pinout tables [K]. 2004.
  • 9于大鑫,徐彦峰,陈诚,等.一种FPGA六长线及其斜向互连开关的测试方法:中国.201110257598[P].2011-09-02.
  • 10XILINX. Using block select RAM + memory spartan-lI FPGAs [ K]. 2000.

二级参考文献19

  • 1吴继娟,孙媛媛,刘桂艳.基于BIST的FPGA逻辑单元测试方法[J].哈尔滨工业大学学报,2004,36(8):1074-1076. 被引量:5
  • 2RENOVELL M, PORTAL J M, FIGUERAS J, et al. SRAM-based FPGAs: testing the RAM mode of the LUT/RAM modules [C] // IEEE European Test Workshop. Barcelone, Spain. 1998: 146-151.
  • 3RENOVELL M, PORTAL J M, FIGUERAS J, et al. An approach to minimize the test configuration for the logic cells of the Xilinx XCA000 FPGAs family [J]. J Elec Test: Theo and Appl, 2000, 16(3): 289-299.
  • 4Xilinm XCA000E and XCA000X series field programmable gate arrays [Z]. 2003.
  • 5何涛.基于软硬件协同技术的FPGA测试平台设计及测试实现[D].成都:电子科技大学,2009.
  • 6朱建光.FPGA芯片的软硬件协同测试平台的设计[D].成都:电子科技大学,2008.
  • 7Michel Renovell, Jean Michel Portal, et al. Testing the Interconnect of RAM-Based FPGAs [J]. IEEE Design &Test Of Computers, 1998.
  • 8Sying-Jyan Wang, Chao-Neng Huang. Testing and Diagnosis of Interconnect Structure in FPGAs [J]. IEEE, 1998.
  • 9Yinlei Yu, Jian Xu, Wei Kang Huang. Fabrizio Lombardi, "Mimimizing the Number of Programming Steps for Diagnosis of Interconnect Faults in FPGAs [A]. Test Symposium, (ATS'99) Proceedings [C]. 1999. 357-362.
  • 10Hiroyuki Michinishi, Tokumi Yokohira, Takuji Okamoto. A Test Methodology for Interconnect Structure of LUT-Based FPGAs [A]. Proceedings of ATS'96, IEEE [C]. 1996.

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