摘要
在集成电路的版图设计中,有两个步骤很重要:在EDA系统上对IC版图提取元器件和连线表,构成线路图;再将它与独立设计的线路图进行同一性验证。其中,前者较重要,而模块识别又是从版图提取线路图中最常用、最有效的方法。本文先阐述模块识别的理论原理,再介绍具体的实现方法,最后,给出一些实际的例子。
There are two important procedures in layout of IC: extracting components and netlist from layout with EDA system to form schematic, identifying and verifying the extract- ed schematic with another schematic designed independently. Here the former is more im- portant, and the module recognition is the most useful and effective method when extracting schematic from layout. The theoretical principle is described in the paper, followed by actualized method in details, and some examples are also given.
出处
《微电子技术》
2000年第4期20-23,共4页
Microelectronic Technology
关键词
模块识别
集成电路
版图验证
IC Design, Module recognition, Verification of layop