可重塑处理器:用户可定义的加速器中处理器架构

Elastic Processor:A User-Defineable Processor in Accelerators Architecture

针对物联网、海计算等新型应用需求,提出一种高效能,通用的可重塑体系结构设计方法,称为"加速器中处理器"。该设计方法将传统处理器的软硬件接口抽象层次从指令提升为函数,应用程序直接映射到片内的加速器层次结构上,而不再通过编译-链接-汇编转换为指令组合。其硬件架构和程序开发模式的核心思想是采用开放式的硬件函数池,聚簇分析主流应用的核心算法并将其定制硬件化,并根据应用程序的数据和控制流,由用户定义硬件函数之间的互连,从而有效提升处理器效能。

This paper proposes a highefficient, generalpurpose elastic processor architecture, called “Processor in Accelerators”to meet the requirements of Internet of Things （IoT） and Ocean Computing applications. Elastic processor promotes the traditional hard-ware-softeware interface of instruction set to functional library. Applications can be directly mapped to these hardware modules instead of being compiled, linked and assembled to machine instructions. This ground - breaking architecture has a special hardware substrate and software/hardware codesign flow. It leverages an open hardware function pool to accelerate the kernel algorithms in mainstream applications. The interconnections among these modules can be defined according to the data/control flow of user applications. The combination of the above can increase processors＇ powerefficiency dramatically.