混合信号电路可测性结构研究

Research on Testability Structure of Mixed-Signal Circuit

在深入研究IEEE1149.1及IEEE1149.4标准的基础上,对基于边界扫描的混合信号电路的可测性结构进行了探索;对所设计混合信号电路可测性结构用可编程逻辑器件及外部模拟电路进行硬件的具体实现,构建了验证模块DOT4MBST;同时以DOT4MBST与IEEE1149.4工作组提供的标准验证芯片为核心对同结构的混合信号电路构建了验证电路;最后对验证模块DOT4MBST及验证电路进行了测试验证,测试结果表明,所设计的混合信号电路可测性结构是可行的,并可以应用到混合信号电路中提高电路的可测试性。

With intensive study on IEEE std 1149.4 and IEEE std 1149. 1, this paper explores the testability structure of mixed--signal circuit based on boundary-scan. A testability structure of mixed--signal circuit is designed and realized, Moreover, by using the program- mable logic device and exterior analog circuits, the testability structure of mixed--signal circuit is implemented, and that construct the verifi- cation module DOT4MBST. The verification module DOT4MBST and the standard verification chip which was provided by the IEEE1149.4 work team are used to construct the verification circuits that have the same structure. Finally, the function of the verification module DOT4MBST and the verification circuits are verified. The result of test indicates that the testability structure of mixed--signal circuit de- signed in this paper is feasible and can be applied in the mixed--signal circuits to enhance the testability of the circuits.