一种基于直方图的ADC静态参数内建自测试设计方案

A BIST Scheme Base on Histogram to Test ADC Static Parameters

本文提出了一种基于直方图(Histogram)的内建自测试(BIST)结构来测试ADC的静态参数,包括偏移误差(Offset Error)、增益误差(Gain Error)、积分非线性(INL)和微分非线性(DNL).BIST体系结构主要包括波形生成控制器、一个基于DDS的数字正弦发生器、一个数字三角波发生器和一个CPU核.三角波信号被用来作为激励信号,经过数字三角波发生器和DAC转换而成.这种ADC内建自测试方案可以通过编程实现重配置,主要包括ADC精度(与待测ADC有关)、激励信号波形类型、频率和初始相位.整个BIST通过FPGA开发板来实现,实验结果表明此BIST结构可以有效测试ADC的静态参数.

This paper proposes a new built-in sell-test （BISI） scheme based on histogram to test anaiog-to-algitai converter （ADC） static parameters, including the Offset Error, the Gain Error, the Integral Non-linearity （INL） and the Differential Non-linearity （DNL）. The proposed BIST mainly consists of a waveform generate controller, a direct digital synthesizer （DDS） sine waveform generator, a triangle waveform generator and a CPU core. The triangular wave signal is used as the stimulus, generated by a triangle waveforrn generator. This ADC BIST scheme features that the waveform, the frequency, the initial phase can be reconfigured through programming. The BIST is implemented on a FPGA development board, and experiment results indicate that the BIST scheme can effectively test static parameters of ADCs.