摘要
为提高自适应PMD补偿控制模块的响应速度,设计了一种基于数字信号处理器(DSP)+现场可编程门阵列(FPGA)混合结构的PMD补偿逻辑控制模块,给出了模块内各单元的实现方法。对PMD补偿逻辑控制模块的性能分析表明:本模块补偿效果良好,一个补偿时间单元的总耗时为611μs,在此期间内硬件工作总时间为110.7μs,分别仅为DSP方式的1/3和1/8。
In order to improve the response speed of adaptive PMD compensation control module, we design a PMD compensation logic control module based on the hybrid structure of digital signal processor (DSP) and field programmable gate array (FPGA).And the realization method of each unit within the module is also shown. The performance analysis of PMD compensation logic control module shows that the module has good compensation effect,and one compensation time unit of this module consumes 611 μs and the total hardware working time within it is 110.7μs, which are only about 1/3 and 1/8 of the module using DSP, respectively.
出处
《光通信技术》
CSCD
北大核心
2012年第11期32-34,共3页
Optical Communication Technology
基金
山东省科技攻关项目(2009GG10001026)资助
聊城大学科研项目(X10004)资助