数字AGC技术研究与FPGA实现

Study on Digital AGC Technology and Its FPGA Implementation

在短突发无线通信中,要求数字自动增益控制环路(DAGC)捕获带宽大,捕获时间短,为加大环路的捕获带宽,应提高环路的增益K或者增加环路滤波器带宽,但是提高环路增益或增加环路滤波器带宽往往与提高环路的跟踪性能和抗噪声性能的要求相矛盾。针对以上需求,设计了具有快速捕获能力且跟踪和滤波性能较好的DAGC电路,并且基于现场可编程门阵列(FPGA)实现,该方法经过检验,可运用到实际系统中。

For the burst wireless communication requires that the capture bandwidth of DAGC （Digital Automatic Gain Control） should be large while the capture time be short, so it is necessary to increase the loop gain K or the loop filter bandwidth, and thus to raise DAGC＇ s capture bandwidth. However, this would usually reduce the tracking and anti-noise performance of DAGC. For these a FPGA implemention-based DAGC circuit with fast capture capability and fairly good anti-noise and filtering performance is proposed and designed. This method is experimentally verified and could be applied to practical system.