VHDL语言教学的几个关键问题探讨

The discussion of several key problems in VHDL language teaching

针对在VHDL语言课程教学中的几个关键问题进行探讨,提出了硬件描述语言的特征、组合电路和时序电路描述方法的区别、信号和变量的合理运用及进程的作用等问题的重要性,通过举例的方法对这几个问题进行详细分析,达到直观易懂的效果。从多轮教学效果来看,所提出的方法对VHDL语言教学,以及VHDL语言的程序设计都具有一定的指导意义。

This paper attempt to discuss several key problems in VHDL language teaching. On this basis, the author comes up with the importance of problems, which include the features of hardware description language, the description style distinction of the combinational circuit and sequential circuit, use in signal and variable. The author has carried on the detailed analysis to these problems by way of examples, so as to achieve an effect of visual and easily understand. Seeing from the several rounds of teaching effect, the proposed approach has a certain guidance meaning in VHDL language and VHDL language programming.