基于FPGA实现时统解码的CPCI板卡设计

Baded on FPGA to achieve timing decoding CPCI card design

时统在作战系统中对各设备之间通信时间的统一同步起着重要的作用。本文主要介绍时统的研制过程以及CPCI板卡和FPGA的应用。板卡主要采用PCI9030作为CPCI接口电路的主要芯片。利用FPGA的可在线编程优点，可根据用户的需求修改参数，接收或产生不同频率、脉宽的时统信号，来满足不同系统对时统信号的要求，并且开发其在WindowsXP和VxWorks操作系统下的驱动程序。

Timing in the combat system of the equipment communication between the unity of the plays an inportant role,this paper mainly introduces the development process as borad and the applicati interface circuit of the users to modify the par on of FPGA to do a simple introd main amete The board users chip,using FPGA on-line programming advantages, needs of different systems on well as to when the CPCI PCI9030 as the CPCI bus according to the needs of , receive or produce different frequency, pulse width timing signal, to meet the the signal requirements, and debeloped in the Windows XP and VxWorks operation system driver.