基于FPGA的祖冲之算法研究与实现

Research and Realization of ZUC Algorithm Based on FPGA

ZUC算法是我国自主设计的一个面向字的流密码,是运用于下一代移动通信4G网络中的国际标准密码算法。它采用128位的初始密钥和一个128位的初始向量作为输入,生成32位关于字的密钥流。密钥流可用于对信息进行加解密。本文主要介绍了ZUC算法并用硬件描述语言VHDL进行了硬件实现,在QuartusⅡ开发环境上的仿真结果与中科院发布的测试文件中的数据一致,从而证明了实现结果的正确性。

The ZUC stream cipher algorithm is a stream cipher algorithm designed by China with full intellectual property. It is one of the three international standard cryptology algorithms to be used in the forthcoming 4G mobile communication era. It takes a 128--bit initial key and a 128--bit initial vector （IV） as input, and outputs a keystream of 32--bit words. This keystream can be use for encryption/deeryption. This article mainly introduces the ZUC algorithm and used the hardware description language VHDL for the hardware realization, the simulation results in QuartusII development environment is consistent with test file data issued by the Chinese Academy of Sciences, thus to proves the accuracy of our realization results.