摘要
This paper focuses on a new design of a down-conversion mixer for a low-IF wideband receiver.Based on the folded structure and differential multiple gated transistor（DMGTR） technique,a novel quadrature mixer with a high conversion gain,a moderate linearity,and a moderate NF is proposed.The mixer is designed and implemented in a 0.18-m CMOS process,and can operate in a frequency range from 150 kHz to 1.5 GHz.The circuit performance is confirmed by both simulation and measurement results.The measurement results exhibit a peak conversion gain of 13.35 dB,a high third order input referred intercept point of 14.85 dBm,and a moderate single side band noise figure of 10.67 dB.Moreover,the whole quadrature mixer core occupies a compact die area of 0.122 mm2.It consumes a current of 3.96 mA（excluding the output buffers） under a single supply voltage of 1.8 V.
This paper focuses on a new design of a down-conversion mixer for a low-IF wideband receiver.Based on the folded structure and differential multiple gated transistor（DMGTR） technique,a novel quadrature mixer with a high conversion gain,a moderate linearity,and a moderate NF is proposed.The mixer is designed and implemented in a 0.18-m CMOS process,and can operate in a frequency range from 150 kHz to 1.5 GHz.The circuit performance is confirmed by both simulation and measurement results.The measurement results exhibit a peak conversion gain of 13.35 dB,a high third order input referred intercept point of 14.85 dBm,and a moderate single side band noise figure of 10.67 dB.Moreover,the whole quadrature mixer core occupies a compact die area of 0.122 mm2.It consumes a current of 3.96 mA（excluding the output buffers） under a single supply voltage of 1.8 V.
基金
Project supported by the Innovation Fund of the Ministry of Science & Technology for Small and Medium Scale Enterprises (No.11c26213211234)
the National Natural Science Foundation of China (No.61106024)
the Specialized Research Fund for the Doc-toral Program of Higher Education,China (No.20090092120012)
