一种基于FPGA的DDR SDRAM控制器的设计

Design of a DDR SDRAM Controller Based on FPGA

对DDR SDRAM的基本工作特性以及时序进行了分析与研究,基于FPGA提出了一种通用的DDRSDRAM控制器设计方案。在Modelsim上通过了软件功能仿真,并在FPGA芯片上完成了硬件验证。结果表明,该控制器能够较好地完成DDR SDRAM的读写控制,具有读写效率较高、接口电路简单的特点。

The basic working characteristics and timing analysis of DDR SDRAM are studied, and a universal DDR SDRAM controller based on FPGA is designed. The design function simulation is performed under Modelsim, and testing and verification of the hardware are also completed under the FPGA. Simulation results show that the con- troller can realize read-write control over DDR SDRAM with high read-write efficiency and simple interface circuit.