摘要
在高纯半绝缘(HPSI)衬底上外延生长了SiC材料,自主开发了SiC MESFET器件制作工艺,实现了单胞栅宽27 mm芯片的制作。优化了芯片装配形式,通过在管壳内外引入匹配网络提升了芯片输入阻抗及输出阻抗。利用管壳外电路匹配技术,采用管壳内匹配及外电路匹配相结合的方法对器件阻抗进行了进一步提升。优化了管壳材料结构,采用无氧铜材料提高了管壳散热能力。采用水冷工作的方式解决了大功率器件散热问题,降低了器件结温,可靠性得到提高。采用多胞芯片匹配合成技术,实现四胞4×27 mm芯片大功率合成。四胞芯片封装器件在连续波工作频率为2 GHz、Vds为37.5 V时连续波输出功率达80.2 W(49.05 dBm),增益为7.0 dB,效率为32.5%。
The SiC epitaxial material was grown on the high purity semi-insulating (HPSI). The process for SiC MESFET devices was got by using owned method. The die of SiC MESFETs with 27 mm gatewidth a single cell was fabricated by using owned standard process. The mounting form was optimized. The impendence was increased by using the internally and externally matched circuit. The structure of the package material was optimized to strengthen the ability of power dissipation by using oxygen free copper material. The water cooling method was optimized to put the channel temperature down, solve the large power dissipation problem and improve the reliability. The device with 4 × 27 mm gate-width four cells was finally compounded by multi-cell compounding technique. The device with four cells showed a CW output power of 80. 2 W (49. 05 dBm) with a power gain of 7. 0 dB and a drain efficiency of 32. 5% at 2 GHz and Vds of 37.5 V.
出处
《半导体技术》
CAS
CSCD
北大核心
2013年第2期105-109,共5页
Semiconductor Technology
关键词
SiCMESFET
连续波
大功率
散热
四胞
SiC MESFET
continuous wave (CW)
high power
power dissipation
four ceils