期刊文献+

65nm体硅CMOS工艺器件尺寸对其脉冲削减效应的影响

Effect of Device Size on Pulse Quenching in a 65 nm Bulk CMOS Process
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摘要 利用电路级模拟方法,在65nm体硅CMOS工艺条件下研究了器件尺寸对其脉冲削减效应的影响.结果表明,当被动反相器的尺寸改变时,脉冲削减效应的变化趋势与其内部双极放大效应的强弱有关.在双极放大效应较强时,脉冲削减效应随尺寸的增加而增强;反之,则其脉冲削减效应随尺寸的增加而减弱. The connection between the size of passive inverter and trend of pulse quenching was studied by using circuit level simulation under 65nm bulk complementary metal-oxide-semiconductor transistor (CMOS) process. It is found that bipolar amplification plays an important role in pulse quenching trend after changing the size of passive inverter. Pulse quenching will be zoomed in after increasing the size of passive inverter, whose inner bipolar amplification is stronger. In the contrast, pulse quenching will be zoomed out after increasing the size of passive inverter.
出处 《上海交通大学学报》 EI CAS CSCD 北大核心 2013年第1期33-38,共6页 Journal of Shanghai Jiaotong University
基金 国家自然科学基金项目(60906009 61076025 60970036)
关键词 电荷共享 脉冲削减 双极放大 电路级模拟 charge sharing pulse quenching bipolar amplification circuit level simulation
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