动态可重构众核处理器仿真平台设计

Design of System Level Simulation Platform for Dynamic Reconfigurable Many-Core Processor

针对众核处理器,提出了一种基于计算资源划分机制的动态可重构技术.该技术以虚拟计算群为核心,设计了基于硬件支持的动态可重构子网划分和动态可重构的Cache一致性协议以及动态在线的计算资源调度算法,并对系统级多核仿真平台Gem 5进行了扩展.同时,采用实际测试结果验证了众核处理器中动态可重构技术的有效性.结果表明,动态可重构技术可以提高众核处理器的资源利用率,实现动态可重构的Cache一致性协议以及单一矩形物理子网覆盖的子网划分机制.

A dynamic reconfiguration technique based on the partitioning of computing resources on many- core processor was introduced. According to the locality principle, both the hardware support, including dynamically reconfigurable sub-netting in NoC and dynamically reconfigurable Cache coherence protocol, and the scheduling algorithm for on-chip computing resources are designed to improve the utilization of the many-core processor. This paper also introduced the simulation platform for dynamically reconfigurable many-core processor, which is developed based on system level simulator Gem 5. The Cache coherence protocol with sub-netting and scheduling algorithm mentioned above was implemented. The simulation re- sult proves the improvement for performance of the many-core processor.