一种基于三维堆叠技术的高可靠性Cache结构

A 3D Stacking Technology Based Reliable Cache Architecture

针对三维集成电路的软错误问题,分析了高能粒子进入三维堆叠芯片中的运行轨迹和特性,在分析高速缓冲存储器(Cache)中各部分软错误易感性的基础上,提出了一种基于三维堆叠技术的高可靠性Cache结构R3D-Cache,利用三维堆叠芯片的层间屏蔽效应,以较小的面积和性能开销大幅降低了其软错误率.结果表明,所提出的R3D-Cache结构能够以0.52%～4.17%的面积开销,将Cache的软错误率降低到原来的5%,而所带来的性能开销可以忽略.

Focused on soft error issue in 3D integrated circuits, this paper analyzed particles tracks and characters when high energy particles get into 3D stacking chips, and then presented a kind of 3D stacking technology-based reliable Cache architecture R3D-Cache after analyzing soft error vulnerability of each component of Caches. The R3D-Cache can greatly reduce error rate with little area and performance over- heads. The analysis results show that the proposed structure can bring down soft error rate of Caches to 5% of original one with 0.52%to 4.17%area overhead, while the performance overhead can be ignored.