期刊文献+

一种基于编码分配的报片交换无缓冲路由器

A Flit-Switch Bufferless Router Based on Encoding Allocation
下载PDF
导出
摘要 提出了一种基于编码分配的报片交换无缓冲路由器(FBEA-BLESS),通过非偏转和偏转2级分配策略来减小路由器的关键路径延时,并采用go-stop-steer(GOSS)机制来避免网络的活锁.结果表明,与基准的无缓冲路由器(BLESS)相比,所提出的FBEA-BLESS的网络平均延迟降低了29.4%. A flit-switch bufferless router based on encoding allocation (FBEA-BLESS), was proposed, which can reduce the delay of critical path through two stage switch allocation with non-deflection alloca- tion and deflection allocation. The go-stop-steer (GOSS) strategy was used to avoid livelock in the net- work. The simulation results show that the average delay decreases about 29.4% in the FBEA-BLESS compared with the baseline bufferless router (BLESS).
出处 《上海交通大学学报》 EI CAS CSCD 北大核心 2013年第1期144-148,共5页 Journal of Shanghai Jiaotong University
基金 国家自然科学基金项目(61076020 60873212) 国家自然科学基金重大项目(90707003)资助
关键词 无缓冲路由器 报片交换 编码分配 交叉开关分配 活锁 bufferless router (BLESS) flit-switch encoding allocation switch allocation livelock
  • 相关文献

参考文献7

  • 1Gratz P,Kim C,Sankaralingam K. On-chip interconnection networks of the TRIPS chip[J].IEEE Micro,2007,(05):41-50.
  • 2Dally W J,Towles B. Route packets,not wires:Onchip interconnection networks[A].Las Vegas,NV:ACM,2001.684-689.
  • 3Kahng A B,Li B,Peh LS. ORION 2.0:A fast and accurate NoC power and area model for early-stage design space exploration[A].Nice,France:European Design and Automation Association,2009.423-428.
  • 4Jerger N D E,Peh L S,Lipasti M H. Circuit-swit ched coherence[J].IEEE Computer Architecture Letters,2007,(01):5-8.
  • 5Jerger N E,Peh L S,Lipasti M. Circuit-switched coherence[A].Newcastle upon Tyne:IEEE Computer Society,2008.193-202.
  • 6Moscibroda T,Mutlu O. A case for bufferless routing in on-chip networks[A].Austin,TX:ACM SIGARCH Computer Architecture News,2009.196-207.
  • 7Michelogiannakis G,Sanchez D,Dally W J. Evaluating bufferless flow control for on-chip networks[A].Grenoble,France:IEEE Computer Society,2010.9-16.

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部