纳米CMOS电路的单粒子瞬态影响因素研究

Study on Effect Factors of Single Event Transients in Nano-CMOS Circuits

进入纳米尺度后,单粒子瞬态(SET)成为高能粒子入射VLSI产生的重要效应,准确、可靠的SET模拟对评估VLSI的可靠性有着重要的影响。以反相器为例,针对脉冲峰值和半高全宽两个指标,研究了电路模拟中影响SET的因素,主要有电流脉冲幅值、脉冲宽度、负载电容、环境温度及器件尺寸。通过对45和65 nm两种技术节点下的电路的仿真,研究了这些因素对SET的影响,并探讨了可能的原因。结果显示,这些因素对SET的影响趋势和程度有很大的差异,且器件尺寸越小,这些因素对SET的影响越显著。通过设置合适的参数,可以实现电路的抗辐射加固。

The single event transient（SET） is becoming an important effect produced by energetic particles striking VLSI in nanoscale.The accurate and reliable simulation of the SET is very important to estimate the reliability of VLSI.With the inverter as an example,according to the pulse peak and full width at half maximum,the effect factors of the SET in circuit simulation were studied,including the current pulse amplitude,pulse width,load capacitance,environment temperature and device size.By simulating the circuits at 45 and 65 nm technology nodes,the influences of these factors on the SET were analyzed,and the potential reasons also were discussed.The results show that the effect trend and degree of these factors on the SET are very different.The device size is smaller,the influences of these factors on SET are more prominent.By setting appropriate parameters,radiation hardened circuits can be realized.