摘要
开关电流电路（ＳＩ）是近年兴起的一种模拟电路。文中引用了新型的两步采样开关电流技术（Ｓ２Ｉ），对该电路中减小时钟馈漏效应的几种方法进行了分析。利用差分平衡结构的Ｓ２Ｉ存储单元设计了平衡Ｓ２Ｉ积分器，并在此基础上设计出一种平衡差分结构的二阶调制器。该调制器能够完全与标准 ＣＭＯＳ数字工艺兼容。利用标准１． ２ μｍ数字 ＣＭＯＳ工艺的 ＨＳＰＩＣＥ模型参数进行了分析，该电路信噪比达到７３．３ ｄＢ，精度约为１２位。
A novel two step sampling SI circuit(S2I)is presented. Techniques to minimize the clock feed-through effects are analyzed. A balanced S2I integrator is designed in favor of this circuit. Then,a differential balanced second-order modulator is devised based on the integrator. Fabrication process for the modulator is absolutely compatible with the standard CMOS digital technology. Analysis of the SPICE simulation shows that the modulator has achieved a signal-to-noise ratio of 73. 3 dB and an accuracy of 12 bit.
出处
《微电子学》
CAS
CSCD
北大核心
2000年第4期234-237,共4页
Microelectronics
关键词
CMOS
开关电流电路
填量调制器
Analog circuit
Switched current circuit
S2I
modulato(
