1.5V高速全摆幅BiCMOS逻辑电路的研究

A Study on a 1.5 V High-Speed and Full-Swing BiCMOS Logic Circuit

分析了影响 Bi CMOS全摆幅输出和高速度的因素 ,探索了一种新的抑制 BJT过饱和的反馈网络 ,提出了具有高速全摆幅输出的 Bi CMOS逻辑单元。该单元可以工作于 1 .5V,并且易于实现多输入扩展 ,它特别适于 VLSI设计。模拟结果表明 ,该单元实现了优于 CMOS的全摆幅输出 ,且其速度高于同类 CMOS电路 1 0倍以上。

A novel full-swing and high-speed BiCMOS buffer whose supply voltage is lowered down to 1 5 V is pro posed A new feedback network that restra ins BJT from oversaturation is explored by analyzing factors affecting the full- swing output and high-speed of the BiCMO S logic circuit This new circuit can imp lement multi-input logic circuits with ease,and is especially suitable for VLSI design The proposed circuit outperfo rms CMOS in full-swing output and its sp eed is 10 times faster than CMOS circuit