静态超标量MCU-DSP内核的Load先行访存调度

Load bypassing memory access scheduling for static superscalar MCU-DSP core

针对嵌入式控制与数字信号处理混合应用领域,建立了一种基于MCU-DSP融合架构处理器的Load先行机制。该内核使用静态超标量技术,拥有整数、存取、循环三条流水线,并采用特殊的四级流水。在存取流水线中,Load先行机制通过动态调度指令的访存顺序,实现了Load指令对Store指令的先行,提前了整数流水线中运算操作数的准备,加快了流水线的处理速度。

For embedded controlling and digital signal processing mixed application field, this paper proposed a novel Load bypassing mechanism based on MCU-DSP hybrid architecture processor. The MCU-DSP core used static superscalar micro-ar- chitecture and includes integer, load-store and loop three 4-stage pipelines. By dynamically scheduling the memory accessing sequence of instructions in load-store pipeline, the Load bypassing mechanism implements the execution of Load instruction aheead of Store instruction, which eventually advances the preparation, of the computing operands in integer pipeline and speeds up the entire pipelines.