一种基于双采样、噪声耦合技术的多标准带通ΔΣ调制器设计(英文)

Design of a Multi-standard Band-pass ΔΣ Modulator with Double-Sampling and Noise-Coupled Techniques

提出一种新型的应用于数字中频接收机的开关电容带通ΔΣ调制器架构,该架构基于前馈结构,利用双采样可调谐谐振器,噪声耦合技术和4比特量化器,使调制器在GSM,WCDMA和TD-SCDMA标准下都能达到高的信噪比和动态范围,3个标准的带宽分别为200kHz,5MHz和1.6MHz.后仿结果显示,在0.13μm工艺下GSM/WCDMA/TD-SCDMA的信号噪声失真比分别为84.73/59.89/65.24dB,动态范围的仿真结果分别为87,72和82dB.电路的采样频率为100MHz,工作电压为1.2V,总功耗为16.1mW.

A new switched-capacitor band-pass ΔΣ modulator architecture in digital intermediate-frequency receivers for multi-standard application is proposed.It uses double-sampling tunable resonators,noise-coupled technique and 4-bit quantization based on feed-forward architecture to achieve high Signal-to-Noise-and-Distortion Rate（SNDR） and dynamic range（DR） under GSM,WCDMA and TD-SCDMA standards.The signal bandwidths of the three standards are 0.2/5/1.6MHz,respectively.Post simulation result shows that the SNDR of GSM/WCDMA/TD-SCDMA can achieve 84.73/59.89/65.24dB under 0.13μm CMOS process while the simulated results of DR are 87/72/82dB.The modulator operates at 100MHz sampling frequency and the power consumption is 16.1mW at 1.2V power supply.