高清视频编码在可重构处理器中的映射实现

Implementation of High-Definition Video Coding on Reconfigurable Processor

提出一种高清视频编码在可重构处理器ReMAP上映射实现的方法,采用动态流水重构技术,实现整数运动估计、环内算法等多个关键子算法在可重构处理器中的分时复用映射。仿真验证表明,可重构处理器ReMAP可支撑高清视频编码的高性能实现;另一方面,动态可重构技术可有效提升可重构处理器的利用率,充分利用可重构处理器的处理能力,减少算法对中间暂存数据存储空间的需求。

An approach to implement high-definition video coding on dynamic reconfigurable processor ReMAP was presented.Key algorithms,such as integer motion estimation（IME）,discrete cosine transform（DCT）,were mapped by time division multiplexing on reconfigurable processor using pipeline reconfigurable technique.Algorithm mapping was simulated and verified.Results showed that high performance implementation of high-definition video coding could be achieved on ReMAP,and on the other side,the pipeline reconfigurable technique could promote utilization of the processor,making full use of the capability of the reconfigurable processor,and reducing memory space needed for temporary data.