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基于CMOS工艺的高Q值集成电感设计

Design of CMOS Integrated Inductor with High Quality Factor
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摘要 采用三维全波电磁场模拟软件HFSS作为分析工具,对八边形差分对称结构电感和单端结构电感进行对比研究,提出利用多层金属并联布线、渐变线宽和图案接地屏蔽(PGS)等结构与差分对称结构集成来提高片上电感性能的设计方案。此方案能与标准硅基CMOS工艺兼容。仿真结果表明,该方案能有效提高集成电感的Q值。 A comparative study was made on octagonal integrated inductor with differential symmetric structure and single-ended inductor using 3D full-wave electromagnetic simulation software HFSS.A design scheme was proposed to improve the performance of integrated inductor by integrating multilayer parallel wiring,tapered metal width and PGS structure with differential symmetric structure.Simulation results showed that those schemes,which were compatible with standard Si CMOS process,could improve the quality factor of integrated inductors effectively.
出处 《微电子学》 CAS CSCD 北大核心 2013年第1期107-110,114,共5页 Microelectronics
基金 湖北省教育厅科研计划资助重点项目(D20102026) 襄樊学院科研项目资助(2010YA019)
关键词 集成电感 品质因数 差分对称 渐变线宽 图案接地屏蔽 Integrated Inductor Quality factor Differential symmetry Tapered metal width PGS
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  • 1冯冠中,张玉明,张义门.硅衬底上射频集成电感研究[J].电子器件,2005,28(1):25-29. 被引量:10
  • 2樊永祥,杨银堂.不同几何参数对螺旋电感性能的影响研究[J].电子器件,2005,28(1):118-121. 被引量:3
  • 3Soyuer M,Burghartz J N.Multilevel monolithic inductors in silicon technology [J].Electron Lett,1995;31(5):359—360.
  • 4Burgharz J N.Monolithic spiral inductors fabricated using a VLSI Cu—damascene interconnect technology and low—loss substrates[A].IEEE IEDM[c].San Francisco,1996.99—102.
  • 5Burgharz J N.Novel substrate contact structure for high—Q silicon—integrated spiral inductors[A].IEEE IEDM[c].Washington,1997.55—58.
  • 6Brghartz J N.Progress in RF inductors on silicon-understanding substrate losses [A].IEEE IEDM[C].San Francisco,1998.523—526.
  • 7Lopez—Villegas J M,Samitier J,Charles C.Improvement of the quality factor of RF integrated inductors by layout optimization[J].IEEE Trans Microwave Theory and Technique,2000;48(1):76—83.
  • 8Harame D L. Current status and future trends of SiGe BiCMOS technology [J]. IEEE Trans Electron Devices, 2001; 48 (11): 2527-2594.
  • 9Yu C P, Wong S S. On-chip spiral inductors with pattern ground shield for Si-based RF IC's [J]. IEEE J Sol Sta Circ, 1998; 33 (5):743-752.
  • 10Yoshitomi T. On-chip spiral inductors with diffused shields using channel-stop implant [A]. IEEE IEDM[C]. San Francisco,1998. 541-543.

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