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基于I2C总线CMOS成像系统的设计与实现 被引量:2

Design and Implementation of Imaging System Based on I2C Bus
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摘要 为了获取各种期望效果的稳定图像,提出了基于I2C总线的以FPGA为控制核心的CMOS成像系统。该系统以OV5620为数字图像传感器,Altera公司的EP2C35系列现场可编程门阵列为系统控制核心,通过I2C总线控制及配置获取该成像效果所需的寄存器,图像信号通过SDRAM乒乓缓存后输出到VGA显示器上显示该期望效果的图像,不同的寄存器配置值将会产生不同的显示效果。通过实验验证了该系统能通过改变寄存器值而达到不同的期望效果。 To get a stable image system which is controlled by FPGA is of various expectative effects, the I2C-based CMOS imaging proposed. The system chooses OV5620 as digital image sensor and the EP2C35 series Field Programmable Gate Array of Ahera Company as control core. The registers of the image sensor would be controlled and configured by the I2C bus, and then the image signal was output to a VGA monitor after it went through the ping-pang cache of two pieces of SDRAM chip. Different value of registers will lead to different image of expectative effects on VGA monitor. The experimental results show that the system could achieve the desired effect by changing the values of image sensor's registers.
出处 《影像技术》 CAS 2013年第1期47-51,共5页 Image Technology
关键词 I2C CMOS图像传感器 FPGA 成像系统 乒乓缓存 I2C CMOS Imaging Sensor FPGA Imaging System Ping-Pang Cache
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  • 1何利民.I2C 总线应用系统设计[M].北京:北京航空航天大学出版社,1994.201-212.

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