顺序写随机读存储器的可测性设计及故障诊断

Testable Design and Fault Diagnosis of Sequentially Written/Randomly Read Memories

顺序写随机读型存储器(SWRRM)广泛应用于程控数字交挟机中.本文讨论了顺序写随机读型存储器模块的可测性,提出了电路设计的改进方案及故障诊断算法.详细介绍了电路设计原理及其实现,所介绍的方法已应用于国产程控数字电话交换机中.

The memories which the data is cyclically written to by hardware logic using a counter synchronized to the network clock and is read from by the CPU, if necessary,have been widely used in SPC exchanges.In this paper,the testa- bility of this type of memory is discussed.An improved circuit design and an algorithm for fault diagnosis are developed.The circuit design philosophy and the hardware implementation are presented.The circuit design and algorithm given here have been used in a SPC digital telephone switching system developed by China.