一种具有采样保持功能的开关电容积分器

A Switched-Capacitor Integrator with Sample and Hold Function

本文提出了一种开关电容积分器结构,运用增益提高技术的折叠式共源共栅放大器实现,可应用于具有采样保持功能的电路中.基于标准的65nm CMOS工艺,通过HSPICE仿真验证,结果表明,该积分器在采样相与积分相能保持相同电平,且对输入信号起到采样和保持作用,在输入信号的VPP=1.4V、频率为10kHz、采样频率为6.144MHz条件下,电路的THD为-112dB.

A switched--capacitor integrator with S/H function was proposed in this circuit, which was realized by the gain--boosting folded cascade OTA. Based on 65 nm CMOS process, HSPICE simulation results showed that, the integrator can keep the same level in the sampling and integral phase, which was used to sample and hold the input signal, for input signal of 10 kHz with Vpp =1.4V, the SHA had a THD of --112dB at a sampling frequency of 6. 144MHz.