TMS320VC33虚拟内核流水线仿真优化设计方法研究

Research on TMS320VC33 Virtual Kernel Pipeline Simulation Design Optimization

搭建全数字仿真测试环境的关键是虚拟内核的研制。流水线仿真优化设计对虚拟内核运行效率的提高至关重要。本文研究了TMS320VC33虚拟内核流水线仿真优化设计方法,基于TMS320VC33流水线工作原理运用译码缓存策略和预译码策略对流水线仿真过程进行优化,并提出了一种流水线仿真优化设计整体方案。

The development of virtual kernel is the critical factory of building digital simulation test environment. The pipeline simulation optimization design is important for enhancing of virtual kernel operational efficiency. The method of TMS320VC33 virtual kernel pipeline simulation design optimization is introduced in this paper. Based on studying how the TMS320VC33 pipeline works, the decoding cache strategy and pre-decoding strategy wear is used to optimize the pipeline simulation. And one total design solution is provided.