一种1.2V,80mA,5μF快速瞬态响应、高稳定性LDO的设计

The Design of 1.2 V,80 mA,5 μF LDO with Fast Transient Response and High Stability

基于上华0.5μm工艺,设计了输入电压为1.5V,输出电压为1.2V,最大输出电流为80mA,用于DC/DC里的CMOS低压差线性稳压器(Low-dropout regulator),作为带隙基准输出端的后续模块,以达到滤波和提高参考电压精度的目的。提出了一种补偿网络,可以保证负载电流发生变化时,相位裕量不发生变化;在补偿网络的基础上添加一个感应电容能够快速跟踪极点的变化,从而保证在负载电流跳变瞬间稳定性保持不变,防止了输出电压发生振荡的情形。此外,设计了一种瞬态响应提高电路结构来改善负载瞬态响应。仿真结果表明,在tt corner下该LDO线性稳压器在负载电流为1mA和80mA时的相位裕度均为83°,环路增益为80dB,流片测试结果显示过冲电压和欠冲电压均不超过100mV。

A low-dropout regulator is designed for DC/DC in CSMC 0.5 μm process with in- put voltage of 1.5 V,output voltage of 1.2 V and maximum output current of 80 mA. To guaran- tee stability of the system when load current changes, this paper proposes a novel compensation scheme which uses a sensing capacitor to track changes of the poles instantly to prevent output from oscillating. In addition, we design a circuit to improve load transient response. Simulation results show the LDO achieves 83°phase margin and 80 dB loop gain in tt corner when the load current are 1 mA and 80 mA. And the taped test results show that the overshoot and undershoot voltages are within 100 mV.