摘要
针对最高传输速率为Gb/s量级的OFDM试验系统,提出一种改进的定时同步方案。基于卷积计算和自相关计算,具有较高的同步准确性及较快的帧检测速度。改进同步算法在Xilinx公司的Virtex-5 FPGA芯片中实现,其消耗的资源都能控制在总资源的20%以内。最终,该实现方案在一个实时系统中得到应用,并在这个平台上进行了性能验证。在室内无线信道环境及接收信号幅值异常情况下,该算法的实现方案都能准确、稳定地工作。
This paper proposes an improved timing synchronization method for a Gb/s OFDM trial system. It is based on the convolution and correlation calculation and has fast detection rate and high synchronization performance. The proposed algorithm is implemented on a virtex-5 FPGA of Xilinx and the hardware resource consumption is lower than 20% of the total resource. Final- ly, the implementation scheme is applied to a real-ime system and verified in this platform. In the indoor wireless environment and situation of abnormal amplitude of the received signal, the scheme can work as normal.
出处
《电子技术应用》
北大核心
2013年第3期100-103,107,共5页
Application of Electronic Technique