基于FPGA的带寄存器寻址SPI接口设计

Design of FPGA-based SPI interface with register addressing

随着物联网技术的发展,硬件间的相互通信速度要求越来越快。文中给出了采用Verilog HDL语言以有限状态机的形式,在FPGA中实现对带寄存器寻址的SPI接口控制的方法;同时介绍了通过SPI接口的结构和工作原理,提出了所设计的SPI接口要求,并通过Modelsim SE 6.5仿真软件进行了仿真实验,得到了符合设计要求的仿真波形,且在FPGA开发板上得到了正确验证,证明该设计可应用于带寄存器寻址的SPI接口配置。

The requirement for speed of the communication between hardwares is faster and faster, with the development of IOT technology. In this paper, a control method of SPI interface for register addressing is implemented in the FPGA by using the form of a finite-state machine which adopts Verilog HDL language. Through the introduction of the structural and working principle of the SPI interface, the design requirement of the SPI interface is proposed. The required simulation waveform was achieved by simulation of software Modelsim SE 6.5, and was properly validated on a FPGA development board. The result shows that the design can be applied to SPI interface with register addressing configuration,