摘要
相比于传统的硬判决译码算法,RS码软判决译码算法能够获得更大的编码增益,但硬件实现较为复杂.针对这一问题,本文在LCC软判决译码算法的基础上提出了一种改进型校验子算法,可在不影响译码性能的前提下大幅降低硬件复杂度.仿真结果表明,本文设计的RS(255,239)码η=3译码器,在BPSK调制下通过AWGN信道,相比于现有基于校验子的RS码译码器结构,硬件资源消耗减少20%.采用SMIC 0.18μm CMOS工艺实现,芯片面积仅为0.81mm2.
Compared to the conventional hard-decision decoding algorithm, the algorithm of softdecision decoding RS code could achieve larger coding gain, but its hardware implementation is more complex. To solve this problem, an improved syndrome algorithm based on low-complexity chase (LCC) soft decision decoding is presented in this paper, which can significantly reduce the hardware complexity without having an effect on the decoding performance. Compared to the existing RS decoder based on syndrome computation, the hardware consumption of the proposed one for RS (255, 239) code with η=3 and BPSK modulation in AWGN channel can be reduced by 20%. Under SMIC 0.18 μm CMOS process, the chip area is only about 0.81 mm2.
出处
《北京理工大学学报》
EI
CAS
CSCD
北大核心
2013年第3期276-279,共4页
Transactions of Beijing Institute of Technology
基金
天津自然科学基金资助项目(11ZCKFGX00700)