期刊文献+

Buck DC-DC变换器电感的优化设计 被引量:4

Optimization of Inductance for Buck DC-DC Converter
下载PDF
导出
摘要 提出了一种优化电感的设计方法,以最小的电感实现了Buck DC-DC变换器最大输出纹波电压(MOVR)达到极小值.该方法首先通过计算得到连续导电模式(CCM)和不连续导电模式(DCM)下的输出纹波电压,然后根据电感取值分析这两种模式下的MOVR,最终得到了使MOVR达到极小值的最小电感.分析得到,对于任意给定的输入电压和负载范围,计算最大输入电压、最小负载下CCM和DCM模式的临界电感和最小输入电压、最大负载下的临界电感,则最优电感为两者中的较大值.Pspice仿真结果验证了上述理论分析的正确性,开关频率为52kHz,输出电压12V时,对于给定输入电压范围15~21V,负载范围35~170Ω,最优电感为327μH. In order to realize the lowest maximum output voltage ripple(MOVR) of Buck DC-DC converter with the minimal inductance,an optimal inductance design method is proposed.Output voltage ripple(OVR) under continuous conduction mode(CCM) and discontinuous mode(DCM) was obtained by calculation,then MOVR in the two modes was analyzed according to the inductance value,and ultimately the minimum inductance to achieve the lowest MOVR was obtained.For any given range of the load and input voltage,by comparing the critical inductance between CCM and DCM under the maximum input voltage,minimum load condition and under the minimum input voltage,maximum load condition,it is concluded that the minimum inductance to guarantee the lowest MOVR is actually the maximum value of the critical inductance under the two conditions.The Pspice simulation results are in favor of the proposed theory.
出处 《南开大学学报(自然科学版)》 CAS CSCD 北大核心 2012年第6期33-40,共8页 Acta Scientiarum Naturalium Universitatis Nankaiensis
基金 天津市滨海新区科技计划(2011-BK120033) 天津市科技支撑计划重点项目(09ZCKFGX00900)
关键词 BUCK DC-DC变换器 输出纹波电压 临界电感 最大输出纹波电压 Buck DC-DC converter output voltage ripple critical inductance maximum output voltage ripple
  • 相关文献

参考文献13

  • 1Xu J, Qin M. Multi-pulse train control technique for buck converter in discontinuous conduction mode[J]. IET Pow- er Electron, 2010, 3(3):391-399.
  • 2Chiang Chu-Yi, Chen Chern-Lin. Zero-Voltage-Switching control for a PWM buck converter under DCM/CCM boundary[J]. IEEE Transactions on Power Electronics, 2009, 24(9):2 120-2 126.
  • 3Huang Han-Hsiang, Chen Chi-Lin, Chen Ke-Horng. Adaptive Window Control (AWC) Technique for Hysteresis DC-DC buck converters with improved light and heavy load performance[J]. IEEE Transactions on Power Electron- ics, 2009, 24(6):1 607-1 617.
  • 4Ma Feng-Fei, Chen Wei-Zen, Wu Jiin-Chuan. A monolithic current-mode buck converter with advanced control and protection circuits[J]. IEEE Transactions on Power Electronics, 2007, 22 (5) :1 836- 1 846.
  • 5Marcos Alonso J, Marco A Dalla Costa, Carlos Ordiz. Integrated buck-flybaek converter as a high-power-factor off- line power supply[J]. IEEE Transactions on Industrial Electronics, 2008, 55(3):1 090-1 100.
  • 6Angel V Peterchev, Seth R Sanders: Digital Loss-Minimizing Multi-Mode Synchronous Buck Converter[C] //2004 IEEE 35th Annual Power Electronics Specialists Conference, June 20- 25, 2004, Aachen, Germany.Piscatway: In- stitute of Eleetronical and Electronics Engineers Inc, 2004: 3 694-3 699.
  • 7Angel V Peterchev, Seth R Sanders. Digital multimode buck converter control with loss-minimizing synchronous rec-tifier adaptation[J]. IEEE Transactions on Power Electronics, 2006, 21(6): 1 588-1 599.
  • 8. Nisha Das, Marian K Kazimierczuk. Power Losses and Efficiency of Buck PWM DC-DC Power Converter[C]//Pro- ceedings: Electrical Insulation and Electrical Manufacturing Conference, October 23- 26, 2005, Indianapolis, IN, USA. Piscataway : Insitute of Electronical and Electronics Engineers Inc, 2005 : 417- 423.
  • 9Ebrahim Babaei, Mir Esmaeel Seyed Mahmoodieh, Hamed Mashinchi Mahery. Operational modes and output volt- age-ripple analysis and design considerations of buck boost DC-DC converters [J]. IEEE Transactions on Industrial Electronics, 2012, 59(1): 381-391.
  • 10Liu Shulin, Liu Jian, Mao Hong, etal. Analysis of operating modes and output voltage ripple of boost DC-DC con- verters and its design considerations[J]. IEEE Transactions on Power Electronics, 2008, 23(4): 1 813-1 821.

同被引文献41

引证文献4

二级引证文献6

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部