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视频编解码器H.264的DSP实现与优化 被引量:1

Implementation and Optimization of Video Codec H.264 on DSP
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摘要 为了提高视频通信中数据传输的效率,在TI的TMS320DM6446开发平台上,对H.264视频编解码器进行了研究。阐述了达芬奇平台的特点及开发方法,分析了视频编解码的实现过程,并对代码进行了优化,详细讨论了基于达芬奇平台的C程序源代码转化为汇编的优化技巧,对优化结果进行了比较和分析。该设计解决了达芬奇芯片内部DSP端和ARM端之间的双核通信问题。通过试验验证,基于该硬件平台实现的视频编解码器稳定可靠,有效地提高了视频的传输效率,其较好的压缩效果和可重构的灵活性也能够很好地满足工程应用的要求。 In order to improve efficiency of the data transfer in Video communications,H. 264 Video codec is researched based on TI processor TMS320DM6446. This paper introduces the characteristic of the processor and its developing method, analyzes the achieva- ble process of Video Codec. This paper also describes the optimizing techniques and discusses the optimizing technique translating C source code into assembly based on DaVinci. And the performances are compared and some conclusions are presented. The communica- tion between DSP and ARM is also solved in the design. Though experiment,the Video Codec based on TMS320DM6446 is proved to be stable and reliable. It also improves transmission efficiency. It also provides good compressing effect and flexible reconfiguration,which can provides good adaptability for engineering.
出处 《无线电工程》 2013年第4期13-16,共4页 Radio Engineering
关键词 达芬奇 编解码引擎 H 264 双核 TMS320DM6446 DaVinci codec engine H. 264 dual-core TMS320DM6446
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