摘要
设计了一种光模数转换(OADC)系统中后端高速数据的存储和传输方案。该方案基于主-从现场可编程逻辑门阵列(FPGA)的结构,采用DDR3 SDRAM作为存储介质,基于PCI Express总线通过存储器直接访问(DMA)机制,使数据高度输出,实现了单通道高速数据的实时存储与传输。仿真和测试表明,该方案能够满足单通道输入数据速率为2.56Gb/s的光模数转换系统的要求。
This paper presents a scheme of high-speed data storage and transmission for optical analog-to-digital conversion(OADC) systems.The scheme adopts a master-slave architecture of field programmable gate array(FPGA) with storage mediums of DDR3 SDRAM and PCI Express external transmission bus using direct memory access(DMA) mechanism.A single channel real-time data storage and transmission was implemented.The results show that the design could meet the storage and transmission requirements of the OADC systems with a 2.56Gb/s data acquisition rate.
出处
《光通信技术》
CSCD
北大核心
2013年第3期54-56,共3页
Optical Communication Technology
基金
国家自然科学基金项目(61071011
61007052
61127016)资助
"973"计划项目(2011CB301700)资助
上海市重大基础项目(10DJ1400402)资助
关键词
光学模数转换
数据采集
DMA控制器
FPGA
optical analog-to-digital conversion
data acquisition
DMA controller
FPGA