基于Verilog的IDMA系统发射端和接收端设计

Design of Transmitter and Receiver for IDMA System Based on Verilog

交织多址IDMA作为一种无线接入多址技术,不仅具有码分多址CDMA技术优势,而且采用交织图机制分离用户,避免了CDMA中受限于扩频码长度分离用户机制的瓶颈。IDMA接收端运用迭代多用户检测技术,在计算复杂度增加较少的情况下,有效提高了频谱利用率。基于IDMA的技术原理,运用Verilog针对IDMA的发射端和接收端进行了仿真设计。实验仿真表明:基于Verilog的IDMA系统的发射端和接收端的设计与理论分析一致,达到了设计要求。

IDMA（Interleave-division multiple-access） is a kind of multiple access scheme which not only has the advan- tages of CDMA （ Code-division multiple-access） , but also uses interleaving figure mechanism to separate the user so that it can avoid bottleneck in the CDMA limited by the length of the spreading code for separating the user mechanism. The receiver of IDMA uses iterative multiuser detection technique and can effectively improve the spectrum utilization in situation of less increase computational complexity. Based on IDMA technology principle, the transmitter and the receiver in IDMA by using Verilog match with the theory. The simulation result shows that the design of transmitter and receiver for IDMA system satisfies the requirements.