基于FPGA的高速数据采集、缓存与处理系统

High-speed data acquisition,caching and processing system based on FPGA

介绍了一种基于FPGA的高速实时数据采集、缓存与处理系统,该系统采用12bit A/D(AD9224),使用20MSPS采样率进行数据采集,数据采集频率为1M,将采集到的数据送入FPGA进行缓存,并做1 024点的FFT变换。该系统实现了对1M正弦信号的采样、缓存及FFT变换,通过Signaltap II Logic Analyzer和MATLAB验证了系统结果的正确性。该系统的设计具有很好的实时性、比较高的精度等优点,可以满足高速信号的采集和处理的需要,为从事高速信号采集和处理的相关人员提供了良好的方法和手段。

A high-speed real time data acquisition, caching and processing system is introduced in this paper. The system uses a 12 bit A/D （AD9224） ,which can have 20 MSPS sampling rate for data acquisition and 1 M for data acquisition frequency. The collected data will be cached and done a 1 024 point FFT transformation in FPGA. The system realizes the sampling cache and FFT transformation of 1 M sine signal. The correctness of the system results is verified through the Signaltap Ⅱ Logic Analyzer and MATLAB. The system designed in this paper has the advantage of good real-time and high accuracy. It is satisfied the need of high speed signal gathering and processing. The design has provided a good method and means for the acquisition and processing of high-speed signals.