摘要
介绍了硅基内埋置有源芯片多层布线工艺、低温共烧陶瓷(LTCC)基板工艺、芯片叠层装配等高密度系统级封装技术,重点介绍了系统级封装技术的总体结构设计、主要工艺流程、三维层叠互连的关键工艺技术,以及系统测试和检测评价等技术。
Technologies for system-in-package(SIP),including multilayer wiring process for Si-based embedded active chip,low temperature co-fired ceramic technique and stacked die packaging,were described.The overall structural design of SIP,the major process flow,and key techniques for three-dimensional interconnection of stacked dies were dealt with in particular,as well as techniques for system test,inspection and evaluation.
出处
《微电子学》
CAS
CSCD
北大核心
2013年第2期263-265,281,共4页
Microelectronics
关键词
系统级封装
内埋置多层基板
芯片层叠
System-in-package
Embedded multi-layer substrate
Stacked die