摘要
结合直接数字频率合成(DDS)和锁相环(PLL)技术完成了Ku波段低相噪跳频源的设计。此设计采用双路DDS输出,使频综器在DDS频带内实现脉间随机捷变,在PLL频带内实现脉冲串间跳变。论文通过软件仿真重点分析了系统杂散、相位噪声和跳频时间等频率源关键指标,验证了方案的可行性。
An ku-band low phase noise frequency synthesizer is described based on DDS and PLL technology.A dual DDS is used in this design by which the synthesizer achieves random agile and skipping respectively among pulse frequency in DDS-band and burst pulse in PLL-band.It analyses index of phase noise,spurious and conversion time using software simulating by which it verifies the feasibility of the design.
出处
《舰船电子工程》
2013年第5期83-85,101,共4页
Ship Electronic Engineering
