高精度CMOS时钟占空比纠正器的设计

High precision CMOS clock duty-cycle corrector

设计并实现了一种使用90nm CMOS工艺制造的高精度CMOS占空比纠正器。它的核心电路工作电压为1V,最高工作频率为10GHz。占空比纠正器负责对高速数字电路中的时钟占空比进行纠正,以减小占空比失真造成的确定性抖动。设计利用差分电荷泵方式完成对时钟占空比信息的提取,然后通过闭环负反馈环路来完成失真纠正工作。仿真结果表明,占空比纠正精度非常高,占空比剩余误差在1%以内。

A CMOS clock duty-cycle correction circuit with high precision is described.The circuit is implemented in 90nm CMOS process and power supply voltage is 1V.The maximum frequency is 10GHz.The duty-cycle corrector is used to correct the duty-cycle of the clock to reduce the deterministic jitter introduced by the duty-cycle distortion.The circuits extract the duty-cycle information by differential charge pump and correct the clock distortion by a negative feedback loop.The simulation result shows that the residual error of the duty-cycle distortion is within 1%.