标准单元版图综合工具PLS

Automatic Layout Synthesis System-PLS

文章介绍了一种标准单元版图综合工具（ｃｅｌｌ ｌａｙｏｕｔ ｓｙｎｔｈｅｓｉｓ ｓｙｓｔｅｍ），这是一种完全自动化的ＥＤＡ工具，它能根据输入的单元电路网表和设计规则及单元库高度等参数自动生成符合设计要求且满足设计规则的单元版图。系统采用了改进的布图模式，得出了面积和电性能更加优化的单元版图。文中介绍了系统的设计流程，分析了系统采用的核心布局布线算法，以及在算法实现过程中为适应单元版图的特点和提高效率而作的改进。

PLS: an Automatic Layout Synthesis System for standard cell library is presented in this paper. In this tool, input is the netlist of cell circuits and output is the layout in CIF format. We discuss the layout style employed by PLS and address it's different from the traditional style. The placement and routing algorithms are also introduced here.