期刊文献+

面向车身控制应用的8位MCUJTAG片上调试模块设计

Design of On-chip JTAG Debug Module of an 8 Bit MCU for Body Control Module Applications
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摘要 基于IEEE 1149.1标准,设计了面向车身控制的8位MCU的JTAG片上调试系统。该系统很好地支持断点与观察点设置、外部调试请求、内存和存储器访问等基本调试功能。在几乎不改动内核的基础上,解决了内核中编码长度和执行周期不同的指令,给片上调试带来的困难和挑战,实现了单步调试、指令插入等功能。通过提出的方法,只需保护现场PC值,避免了一系列现场保护措施,减小了硬件实现代价。 According to IEEE Standard 1149. 1, this paper designs an on-chip JTAG debugging system for an 8 bit Body Control Module (BCM) MCU. The system supports basic debugging functions, including breakpoint and watches point setting, debug request, and access to registers and memory, etc. With hardly modifying the core, the challenge is resolved, which results from different instruction coding length and different running cycle, and achieves the functions of single-step and instruction-insertion. With the proposed method, the system does not need reserve any value but pc, reducing the hardware implementation cost.
出处 《科学技术与工程》 北大核心 2013年第16期4711-4716,共6页 Science Technology and Engineering
基金 国家自然科学基金(61006023)资助
关键词 车身控制 MCU 联合测试行动组 IEEE 1149 1 片上调试 单步调试 指令插入 body control MCU JTAG IEEE 1149. 1 on-chip debug single step instruc-tion insertion
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参考文献10

  • 1Van de Log L, Van der Heyden F. An extension to JTAG for at-speed debug on a system. ITC International Test Conference, 2003: 123-130.
  • 2Van Ngo B, Law P, Sparks A. Use of JTAG boundary-scan for testing electronic circuit boards and systems, IEEE Autotestcon 2008, Salt Lake City, UT, 8-11 September 2008:17-22.
  • 3Dettmer R. JTAG setting the standard for boundary-scan testing. IEE Review, 1989 ; 35 : 49-52.
  • 4Lee Whetsel. A high speed reduced pin count JTAG interface, Test Conference, 2006 ; ITC'06. IEEE International, Oct 2006 : 1-10.
  • 5Marchetti T E, Borroz T. Programming flash memory with boundary scan using general purpose digital instrumentation, Autotestcon, 2010 IEEE, 13-16 Sept 2010:1-5.
  • 6IEEE Standard Test Access Port and Boundary-scan Architecture ( IEEE 1149. 1-2001 ), IEEE, June 2001.
  • 7金辉,华斯亮,张铁军,侯朝焕.基于JTAG标准的处理器片上调试的分析和实现[J].微电子学与计算机,2007,24(6):116-119. 被引量:12
  • 8OPEN-JTAG开发小组.ARMJTAG调试原理,http://wenku.baidu.corn/view/0fff274df7ec4afe04aldi38.html.
  • 9Synopsys. Design Ware DW8051 Macrocell Databook, http ://www. synopsys, com.
  • 10Wang Haixin, Deng Jiong, Yu Mengxi, et al. A compact and robust MCU for automotive body application. 11 th International Conference on Solid-state Integrated Circuits Technology, 29 Oct. 2012:1-3.

二级参考文献6

  • 1沈沙,沈泊,章倩苓.一种带有流水线追踪器的JTAG ICE调试电路设计[J].微电子学与计算机,2004,21(7):139-142. 被引量:6
  • 2IEEE Standard 1149.1a,IEEE standard test access port,Boundary Scan Architecture,revised 1993
  • 3ARM Ltd.ARM7TDMI Data Sheet.1995
  • 4MD00047,MIPS Technologies EJTAG Specification.Revision 2.61,Sept 2001
  • 5Application Note.The ARM7TDMI Debug Architecture.Dec.1995
  • 6Dae Young Jung,Sung Ho Kwak,Moon Key Lee.Reusable embedded debugger for 32bit RISC processor using the JTAG boundary scan architecture.ASIC 2002 Proceedings,2002 IEEE Asia-Pacific Conference on Aug 2002:209~212

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